SDG Electronics

ADC dynamic performance

SINAD, ENOB, SNR/THD combination, aperture jitter and oversampling estimates.

Development preview. Check the assumptions below before relying on a result. Calculations run in your browser.

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How it calculates

Model: SNRideal=20log10(2)N+10log10(1.5); SINAD=−10log10(10^(−SNR/10)+10^(THD/10)); ENOB=(SINAD−1.7609)/6.0206

Assumptions

  • Ideal SNR assumes a full-scale sine. Oversampling gain assumes white uncorrelated noise and appropriate filtering/decimation; it does not suppress distortion.
  • Noise-free bits use 6.6× measured RMS noise as a statistical peak-to-peak estimate; this is not a guaranteed excursion bound. Jitter uses a sine input.

Worked example

These are the calculator's default inputs. Change any input above to recalculate.

Inputs

Measured input
SINAD
Nominal bits
12
Measured SINAD
70 dB
Measured ENOB
11
Measured SNR
72 dB
THD relative to signal
-80 dB
Input sine frequency
1000000 Hz
RMS aperture/clock jitter
1e-12 s
Oversampling ratio
4
Full-scale voltage span
3.3 V
Measured input RMS noise
0.0001 V

Results

ENOB
11.3343
Ideal full-scale-sine SNR
74.0081 dB
SINAD
70 dB
Jitter-limited SNR
104.036 dB
Ideal oversampling SNR gain
6.0206 dB
Estimated noise-free bits
12.2877

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