SDG Electronics

ADC passive level shift

ADC passive level shift with explicit circuit assumptions and worked equations.

Development preview. Check the assumptions below before relying on a result. Calculations run in your browser.

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How it calculates

Conductance weights: Vout = α Vin + β Vref; α = Rth/Rin, β = Rth/Rref

Mapping: α = (Vout,H − Vout,L)/(Vin,H − Vin,L)

Offset: β = (Vout,L − α Vin,L)/Vref

Assumptions

  • The reference is a stiff voltage source. Three branches join at the ADC node: input, reference and ground. Source resistance is included in the input branch. This passive circuit only supports positive slopes and nonnegative conductance weights.

Worked example

These are the calculator's default inputs. Change any input above to recalculate.

Inputs

Input low
-10 V
Input high
10 V
Output low
0 V
Output high
3.3 V
Reference rail
3.3 V
Desired Thevenin resistance
1000 Ω
Input source resistance
1 Ω
ADC leakage into node
0 A

Results

Input resistor excluding source
6059.61 Ω
Reference resistor
2000 Ω
Ground resistor
2985.07 Ω
Total input branch resistance
6060.61 Ω
Gain
0.165
Offset
1.65 V
Leakage error
0 V

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