SDG Electronics

BJT differential pair

Large-signal tanh transfer and differential transconductance with a fixed tail current.

Development preview. Check the assumptions below before relying on a result. Calculations run in your browser.

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How it calculates

Assumptions

  • Ideal fixed tail current, matched BJTs, infinite beta and Early voltage; collector saturation and common-mode limits must be checked separately.
  • Gain limit is local transconductance reduction, not total harmonic distortion. Differential load is connected between collectors.

Worked example

These are the calculator's default inputs. Change any input above to recalculate.

Inputs

Tail current
0.002 A
Each collector resistor
4700 Ω
Differential load resistance
100000 Ω
Differential input voltage
0.01 V
Allowed transconductance reduction
1 %
Device temperature
25 °C

Results

Differential output
-1.65135 V
Differential output gain
-167.214
Collector current 1
0.00119219 A
Collector current 2
0.000807811 A
Zero-input differential transconductance
0.0389217 S
Single-ended output gain
-83.607
Differential input magnitude at gain limit
0.00515575 V

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