SDG Electronics

Gain and offset mapper

Gain and offset mapper with circuit equations and operating-limit checks.

Development preview. Check the assumptions below before relying on a result. Calculations run in your browser.

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How it calculates

Required mapping: m = (yH−yL)/(xH−xL); b = yL−m xL

Realisation: V+ = α Vin + β Vref; Vout = G V+

Assumptions

  • Positive-slope designs use a passive mix at the non-inverting input or a positive reference at the inverting ground leg. Negative-slope designs use an inverting amplifier with buffered Vbias; negative bias requires a negative reference rail or reference inverter. All reference/bias sources must have negligible impedance. Rounding holds the specified buffered reference voltage exact. Op-amp rail/common-mode checks are performed in OA-01/02.

Worked example

These are the calculator's default inputs. Change any input above to recalculate.

Inputs

Input low
0 V
Input high
1 V
Output low
0.5 V
Output high
4.5 V
Available reference
5 V
Resistor scale
10000 Ω
Preferred series
96

Results

Required slope
4
Required offset
0.5 V
Chosen stage gain
4.305
Non-inverting bias
0.116144 V
Rounded resistor slope
4.01591
Rounded resistor offset
0.497341 V
Maximum endpoint error
0.0132525 V

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