SDG Electronics

Peak detector and sample hold

Peak detector and sample hold with circuit equations and operating-limit checks.

Development preview. Check the assumptions below before relying on a result. Calculations run in your browser.

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How it calculates

Droop: ΔV = Ileak thold/Chold

Acquisition estimate: tacq ≈ max(C ΔV/Imax, ΔV/SR) + RC ln(1/error)

Charge injection: ΔVQ = Qinj/Chold

Assumptions

  • Positive leakage discharges the hold capacitor. Acquisition sums a large-signal charging interval and a linear RC tail, providing a conservative screening estimate rather than an exact driver model. Dielectric absorption, comparator/diode recovery and leakage temperature dependence are omitted.

Worked example

These are the calculator's default inputs. Change any input above to recalculate.

Inputs

Hold capacitor
1e-7 F
Total signed leakage current
1e-9 A
Hold interval
0.1 s
Acquisition step
1 V
Charging source resistance
100 Ω
Maximum charging current
0.01 A
Driver slew rate
1000000 V/s
Acquisition accuracy
0.1 %
Switch charge injection
1e-12 C

Results

Hold voltage loss
0.001 V
Conservative acquisition estimate
0.0000790776 s
Droop rate
0.01 V/s
Charge-injection step
0.00001 V

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