SDG Electronics

Practical integrator

Practical integrator with circuit equations and operating-limit checks.

Development preview. Check the assumptions below before relying on a result. Calculations run in your browser.

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How it calculates

Lossy integrator: H(s) = −(Rf/Rin)/(1+s Rf Cf)

Ideal ramp: dVout/dt = −Vin/(Rin Cf)

Offset drift bound: |dVout/dt| ≈ |Vos/Rin + Ib|/Cf

Assumptions

  • Rf is in parallel with Cf. Step trace is the unclipped lossy-integrator response. Drift-to-rail assumes an ideal integrator without Rf and a constant worst-direction offset; the lossy circuit instead approaches a finite offset.

Worked example

These are the calculator's default inputs. Change any input above to recalculate.

Inputs

Input resistor
10000 Ω
DC feedback resistor
1000000 Ω
Integration capacitor
1e-7 F
Input step
0.1 V
Initial output
0 V
Input offset magnitude
0.001 V
Inverting bias current
2e-8 A
Output swing magnitude
12 V

Results

Initial signal ramp slope
-100 V/s
Lossy steady-state output
-10 V
Ideal integrating unity frequency
159.155 Hz
Lossy corner
1.59155 Hz
Offset/bias initial drift
1.2 V/s
Ideal-integrator drift to rail
10 s

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