SDG #158 Assembling and testing the 10 MHz GPSDO Reference Prototype Board

This episode follows the first physical build of a 10 MHz GPSDO (GPS disciplined oscillator) reference prototype PCB, taking the design from bare fabricated board to a powered-up, locking unit on the bench. It shows the reality of populating a mixed signal board that was designed on paper: paste application, reflow on a low cost 946C style hotplate, hot air touch-up for the fine pitch parts, and inspection under the microscope before any power is applied.

The assembly commentary adds more than a straight build log because it highlights where a GPSDO design is unforgiving. Timing references depend on the analogue side, so decoupling placement, ground return paths and the loop filter components around the OCXO or VCXO matter more than in a typical digital board. The video also shows why prototype boards should be brought up in stages: confirm the rails first, then the GPS module’s serial output and 1PPS, and only then check whether the control loop is pulling the oscillator into lock.

On the testing side, the focus is on proving basic functionality rather than measuring Allan deviation: verifying that the GPS receiver acquires satellites, watching the lock indication settle, and checking the amplitude and shape of the 10 MHz output waveform at the connector. The distinction matters for anyone building a reference of their own. A board that outputs 10 MHz and indicates lock is only the starting point, and real characterisation needs a second known-good reference for comparison. As a prototype milestone, it shows the design concept is sound while leaving clear items on the revision list.