SDG #163 What's all this GPSDO stuff, anyhow? Why is there an FPGA?

This episode steps back from the bench to explain the theory behind a GPS-disciplined oscillator project, and in particular why an FPGA earns its place in the design rather than being overkill for the sake of it.

The core problem is straightforward to state and difficult to solve well: a GPS receiver’s 1PPS output is extremely accurate over long periods but noisy and jittery second to second, while a good OCXO is beautifully stable over seconds and minutes but drifts over hours, days and years. A GPSDO marries the two, using the long-term truth of GPS to steer the short-term stability of the local oscillator through a very slow control loop. Getting that loop right means measuring the phase difference between the 10MHz oscillator and the 1PPS edge with far better resolution than a simple counter clocked at 10MHz can offer, since one clock period is already 100ns of uncertainty.

That measurement requirement is where the FPGA argument is made. Rather than bolting on analogue ramp generators or interpolation tricks, the FPGA can implement a time interval counter with fine resolution using techniques a microcontroller cannot match, alongside dividers, gating logic and the housekeeping the loop needs, all in deterministic hardware. Comparison with existing designs, both DIY Arduino-based GPSDOs and commercial lab instruments, gives useful context on what accuracy figures actually mean in practice and where holdover performance matters.

For anyone considering building their own frequency reference, the takeaway is that the oscillator is only half the job; the resolution and noise of the phase measurement, plus a sensibly damped control loop, determine whether the finished unit is genuinely better than the raw GPS module it started with.